1. Field of the Invention
The present invention relates to Content Addressable Memory (CAM) and, in particular, to binary and ternary non-volatile CAM memory.
2. Background of the Invention
Content addressable memory (CAM) is utilized in many technology systems, including search engines and network routing systems. In contrast to random access memory (RAM), a content addressable memory identifies which memory location a particular data is located and provides the memory location of that data.
FIG. 1 illustrates a typical RAM array 100 having an array of individual cells 101. Each individual cell typically can store a data bit (logical “1” or “0”). Typically, each individual cell is coupled to one of the word lines WO through WN, write bit lines BwO through BwN, read bit lines BRO through BRN, and a power or ground line VSS/VCC (depending on whether NMOS or PMOS transistors are utilized in the cell). Typically, the word lines W are arranged horizontally in RAM array 100 and the bit lines (alternatively referred to throughout the specification as data lines) are arranged vertically in RAM array 100.
FIGS. 2A through 2C illustrate several different configurations of RAM cells 101. FIG. 2A illustrates a configuration of RAM cell 101 that is coupled to a horizontal word line W, vertical data lines BW and BR, and a power or ground line VSS/VCC. Typically, cell 101 is activated or selected along with other cells 101 in the same row of RAM array 100. Data line BW is then utilized to write data into cell 101 and data line BR is utilized to read data out of cell 101.
In FIG. 2B, RAM cell 101 is coupled to a horizontal word line W and power or ground line VSS/VCC. However, RAM cell 101 of FIG. 2B is coupled to data lines BR and BR, the inverse of BR, as well as data lines BW and BW, the inverse of BW. Again, a row of cells 101 is activated by word line W. Once activated, data lines BW and BW can be utilized to write data into cell 101 while data lines BR and BR are utilized to read data out of cell 101.
In FIG. 2C, the read and write data lines BR and BW are combined into a single line and the inverse data lines BR and BW are combined into a single line. In each of the configurations shown in FIGS. 2A through 2C, a horizontal array of cells are activated by the word line and data can be written into cell 101 through a write data line BW or complementary pair of write data lines and read from cell 101 through a read data line BR or complementary pair of read data lines. Additionally, because word lines W activate a row of cells 101 in RAM array 100, a row of data is either written or read simultaneously. A horizontal row of data (e.g., a word) can be read or written into cells 101 by activating the word line appropriate for that row and either reading the data or applying the data to the data lines in a fashion dictated by the construction of individual cell 101.
In a CAM cell, however, a data is applied to the memory array of a CAM and a compare operation is performed to identify one or more locations within the array that contain data equivalent to the applied data, thereby representing a “match” condition. Upon completion of the compare operation, the identified locations are typically encoded to provide an address at which the equivalent data is located in the CAM array. If more than one match is found, a priority encoding operation may be performed so that the highest-priority data is output.
CAM arrays can be configured as binary cells where data bits (logical “1” or “0”) are stored or ternary cells where states “1”, “0”, or “don't care” are stored. In the “don't care” state, a compare operation yields a match when either a “1” or a “0” is received at that cell. Some CAM memory devices are described in U.S. Pat. Nos. 5,706,224, 5,852,569, 5,964,857 to Srinivasan et al. and U.S. Pat. Nos. 6,101,116, 6,256,216, 6,128,207, and 6,657,878 to Lien et al., assigned to the present assignee, and herein incorporated by reference in their entirety.
CAM cells include a compare capability in order to indicate a match and also should include the ability to read and write to the array. In operation, the CAM cell array is initialized with data before the data can be compared with the contents of the CAM array. Further, it is highly beneficial to include an ability to read data from the contents of the CAM array. Additionally, CAM cells utilizing magnetic memory cells, phase-change memory cells, ferroelectric capacitive memory cells, or other types of memory cells other than conventional NMOS or PMOS transistor latch based cells or FLASH based cells can be utilized.
Therefore, there is a need for CAM arrays that include the ability to read and write data to the memory array while utilizing non-volatile memory systems.